mmSDMA0_RLC5_RB_WPTR_HI  794 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC5_RB_WPTR_HI                                                                        0x0326
mmSDMA0_RLC5_RB_WPTR_HI  810 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC5_RB_WPTR_HI                                                                        0x02ee
mmSDMA0_RLC5_RB_WPTR_HI  806 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC5_RB_WPTR_HI                                                                        0x0326