mmSDMA0_RLC5_MIDCMD_DATA3_BASE_IDX  852 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC5_MIDCMD_DATA3_BASE_IDX                                                             0
mmSDMA0_RLC5_MIDCMD_DATA3_BASE_IDX  869 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC5_MIDCMD_DATA3_BASE_IDX                                                             0
mmSDMA0_RLC5_MIDCMD_DATA3_BASE_IDX  865 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC5_MIDCMD_DATA3_BASE_IDX                                                             0