mmSDMA0_RLC5_IB_BASE_LO_BASE_IDX  809 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC5_IB_BASE_LO_BASE_IDX                                                               0
mmSDMA0_RLC5_IB_BASE_LO_BASE_IDX  825 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC5_IB_BASE_LO_BASE_IDX                                                               0
mmSDMA0_RLC5_IB_BASE_LO_BASE_IDX  821 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC5_IB_BASE_LO_BASE_IDX                                                               0