mmSDMA0_RLC3_MIDCMD_DATA0_BASE_IDX  680 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC3_MIDCMD_DATA0_BASE_IDX                                                             0
mmSDMA0_RLC3_MIDCMD_DATA0_BASE_IDX  695 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC3_MIDCMD_DATA0_BASE_IDX                                                             0
mmSDMA0_RLC3_MIDCMD_DATA0_BASE_IDX  691 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC3_MIDCMD_DATA0_BASE_IDX                                                             0