mmSDMA0_RLC2_RB_WPTR_POLL_CNTL  547 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC2_RB_WPTR_POLL_CNTL                                                                 0x0207
mmSDMA0_RLC2_RB_WPTR_POLL_CNTL  560 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC2_RB_WPTR_POLL_CNTL                                                                 0x01e7
mmSDMA0_RLC2_RB_WPTR_POLL_CNTL  556 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC2_RB_WPTR_POLL_CNTL                                                                 0x0207