mmSDMA0_RLC2_RB_WPTR_POLL_ADDR_HI  588 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC2_RB_WPTR_POLL_ADDR_HI                                                              0x0232
mmSDMA0_RLC2_RB_WPTR_POLL_ADDR_HI  602 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC2_RB_WPTR_POLL_ADDR_HI                                                              0x0212
mmSDMA0_RLC2_RB_WPTR_POLL_ADDR_HI  598 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC2_RB_WPTR_POLL_ADDR_HI                                                              0x0232