mmSDMA0_RLC2_RB_RPTR_HI_BASE_IDX  542 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC2_RB_RPTR_HI_BASE_IDX                                                               0
mmSDMA0_RLC2_RB_RPTR_HI_BASE_IDX  555 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC2_RB_RPTR_HI_BASE_IDX                                                               0
mmSDMA0_RLC2_RB_RPTR_HI_BASE_IDX  551 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC2_RB_RPTR_HI_BASE_IDX                                                               0