mmSDMA0_RLC1_WATERMARK  491 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC1_WATERMARK                                                                         0x01ca
mmSDMA0_RLC1_WATERMARK  313 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA0_RLC1_WATERMARK                                                  0x35aa
mmSDMA0_RLC1_WATERMARK  264 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA0_RLC1_WATERMARK                                                  0x35aa
mmSDMA0_RLC1_WATERMARK  313 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA0_RLC1_WATERMARK                                                  0x35aa
mmSDMA0_RLC1_WATERMARK  432 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA0_RLC1_WATERMARK                                                  0x35aa
mmSDMA0_RLC1_WATERMARK  504 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_RLC1_WATERMARK	0x01ca
mmSDMA0_RLC1_WATERMARK  416 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_RLC1_WATERMARK                                                                         0x01ca
mmSDMA0_RLC1_WATERMARK  504 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC1_WATERMARK                                                                         0x01b2
mmSDMA0_RLC1_WATERMARK  500 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC1_WATERMARK                                                                         0x01ca