mmSDMA0_RLC1_RB_CNTL  450 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC1_RB_CNTL                                                                           0x01a0
mmSDMA0_RLC1_RB_CNTL  291 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA0_RLC1_RB_CNTL                                                    0x3580
mmSDMA0_RLC1_RB_CNTL  242 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA0_RLC1_RB_CNTL                                                    0x3580
mmSDMA0_RLC1_RB_CNTL  291 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA0_RLC1_RB_CNTL                                                    0x3580
mmSDMA0_RLC1_RB_CNTL  410 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA0_RLC1_RB_CNTL                                                    0x3580
mmSDMA0_RLC1_RB_CNTL  462 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_RLC1_RB_CNTL	0x01a0
mmSDMA0_RLC1_RB_CNTL  374 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_RLC1_RB_CNTL                                                                           0x01a0
mmSDMA0_RLC1_RB_CNTL  462 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC1_RB_CNTL                                                                           0x0188
mmSDMA0_RLC1_RB_CNTL  458 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC1_RB_CNTL                                                                           0x01a0