mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX  439 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX                                                             0
mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX  451 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX	0
mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX  363 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX                                                             0
mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX  451 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX                                                             0
mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX  447 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_RLC0_MIDCMD_DATA4_BASE_IDX                                                             0