mmSDMA0_PUB_REG_TYPE3_BASE_IDX   61 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_PUB_REG_TYPE3_BASE_IDX	0
mmSDMA0_PUB_REG_TYPE3_BASE_IDX   59 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_PUB_REG_TYPE3_BASE_IDX                                                                 0
mmSDMA0_PUB_REG_TYPE3_BASE_IDX   61 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_PUB_REG_TYPE3_BASE_IDX                                                                 0
mmSDMA0_PUB_REG_TYPE3_BASE_IDX   61 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_PUB_REG_TYPE3_BASE_IDX                                                                 0