mmSDMA0_PUB_REG_TYPE1_BASE_IDX   57 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_PUB_REG_TYPE1_BASE_IDX	0
mmSDMA0_PUB_REG_TYPE1_BASE_IDX   55 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_PUB_REG_TYPE1_BASE_IDX                                                                 0
mmSDMA0_PUB_REG_TYPE1_BASE_IDX   57 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_PUB_REG_TYPE1_BASE_IDX                                                                 0
mmSDMA0_PUB_REG_TYPE1_BASE_IDX   57 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_PUB_REG_TYPE1_BASE_IDX                                                                 0