mmSDMA0_POWER_CNTL   38 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_POWER_CNTL                                                                             0x001a
mmSDMA0_POWER_CNTL  221 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA0_POWER_CNTL                                                      0x3402
mmSDMA0_POWER_CNTL  159 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA0_POWER_CNTL                                                      0x3402
mmSDMA0_POWER_CNTL  156 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA0_POWER_CNTL                                                      0x3402
mmSDMA0_POWER_CNTL  293 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA0_POWER_CNTL                                                      0x3402
mmSDMA0_POWER_CNTL   66 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_POWER_CNTL	0x001a
mmSDMA0_POWER_CNTL   64 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_POWER_CNTL                                                                             0x001a
mmSDMA0_POWER_CNTL   66 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_POWER_CNTL                                                                             0x001a
mmSDMA0_POWER_CNTL   66 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_POWER_CNTL                                                                             0x001a