mmSDMA0_PHASE2_QUANTUM  144 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_PHASE2_QUANTUM                                                                         0x004f
mmSDMA0_PHASE2_QUANTUM  172 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_PHASE2_QUANTUM	0x004f
mmSDMA0_PHASE2_QUANTUM  172 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_PHASE2_QUANTUM                                                                         0x004f
mmSDMA0_PHASE2_QUANTUM  172 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_PHASE2_QUANTUM                                                                         0x004f