mmSDMA0_PHASE1_QUANTUM   76 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_PHASE1_QUANTUM                                                                         0x002d
mmSDMA0_PHASE1_QUANTUM  240 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA0_PHASE1_QUANTUM                                                  0x3415
mmSDMA0_PHASE1_QUANTUM  177 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA0_PHASE1_QUANTUM                                                  0x3415
mmSDMA0_PHASE1_QUANTUM  175 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA0_PHASE1_QUANTUM                                                  0x3415
mmSDMA0_PHASE1_QUANTUM  312 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA0_PHASE1_QUANTUM                                                  0x3415
mmSDMA0_PHASE1_QUANTUM  104 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_PHASE1_QUANTUM	0x002d
mmSDMA0_PHASE1_QUANTUM  102 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_PHASE1_QUANTUM                                                                         0x002d
mmSDMA0_PHASE1_QUANTUM  104 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_PHASE1_QUANTUM                                                                         0x002d
mmSDMA0_PHASE1_QUANTUM  104 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_PHASE1_QUANTUM                                                                         0x002d