mmSDMA0_PHASE0_QUANTUM   74 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_PHASE0_QUANTUM                                                                         0x002c
mmSDMA0_PHASE0_QUANTUM  239 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA0_PHASE0_QUANTUM                                                  0x3414
mmSDMA0_PHASE0_QUANTUM  176 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA0_PHASE0_QUANTUM                                                  0x3414
mmSDMA0_PHASE0_QUANTUM  174 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA0_PHASE0_QUANTUM                                                  0x3414
mmSDMA0_PHASE0_QUANTUM  311 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA0_PHASE0_QUANTUM                                                  0x3414
mmSDMA0_PHASE0_QUANTUM  102 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_PHASE0_QUANTUM	0x002c
mmSDMA0_PHASE0_QUANTUM  100 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_PHASE0_QUANTUM                                                                         0x002c
mmSDMA0_PHASE0_QUANTUM  102 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_PHASE0_QUANTUM                                                                         0x002c
mmSDMA0_PHASE0_QUANTUM  102 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_PHASE0_QUANTUM                                                                         0x002c