mmSDMA0_PAGE_RB_WPTR_POLL_CNTL  298 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL                                                                 0x00e7
mmSDMA0_PAGE_RB_WPTR_POLL_CNTL  308 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL	0x00e7
mmSDMA0_PAGE_RB_WPTR_POLL_CNTL  308 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL                                                                 0x00df
mmSDMA0_PAGE_RB_WPTR_POLL_CNTL  304 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_PAGE_RB_WPTR_POLL_CNTL                                                                 0x00e7