mmSDMA0_PAGE_RB_WPTR_HI  296 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_PAGE_RB_WPTR_HI                                                                        0x00e6
mmSDMA0_PAGE_RB_WPTR_HI  306 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_PAGE_RB_WPTR_HI	0x00e6
mmSDMA0_PAGE_RB_WPTR_HI  306 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_PAGE_RB_WPTR_HI                                                                        0x00de
mmSDMA0_PAGE_RB_WPTR_HI  302 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_PAGE_RB_WPTR_HI                                                                        0x00e6