mmSDMA0_PAGE_RB_WPTR  294 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_PAGE_RB_WPTR                                                                           0x00e5
mmSDMA0_PAGE_RB_WPTR  304 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_PAGE_RB_WPTR	0x00e5
mmSDMA0_PAGE_RB_WPTR  304 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_PAGE_RB_WPTR                                                                           0x00dd
mmSDMA0_PAGE_RB_WPTR  300 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_PAGE_RB_WPTR                                                                           0x00e5