mmSDMA0_GFX_RB_WPTR_HI  211 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_GFX_RB_WPTR_HI                                                                         0x0086
mmSDMA0_GFX_RB_WPTR_HI  220 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_GFX_RB_WPTR_HI	0x0086
mmSDMA0_GFX_RB_WPTR_HI  216 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_GFX_RB_WPTR_HI                                                                         0x0086
mmSDMA0_GFX_RB_WPTR_HI  220 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_GFX_RB_WPTR_HI                                                                         0x0086
mmSDMA0_GFX_RB_WPTR_HI  216 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_GFX_RB_WPTR_HI                                                                         0x0086