mmSDMA0_GFX_RB_WPTR 209 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_GFX_RB_WPTR 0x0085 mmSDMA0_GFX_RB_WPTR 250 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA0_GFX_RB_WPTR 0x3484 mmSDMA0_GFX_RB_WPTR 191 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA0_GFX_RB_WPTR 0x3484 mmSDMA0_GFX_RB_WPTR 218 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA0_GFX_RB_WPTR 0x3484 mmSDMA0_GFX_RB_WPTR 343 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA0_GFX_RB_WPTR 0x3484 mmSDMA0_GFX_RB_WPTR 218 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_GFX_RB_WPTR 0x0085 mmSDMA0_GFX_RB_WPTR 214 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_GFX_RB_WPTR 0x0085 mmSDMA0_GFX_RB_WPTR 218 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_GFX_RB_WPTR 0x0085 mmSDMA0_GFX_RB_WPTR 214 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_GFX_RB_WPTR 0x0085