mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX  208 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX                                                                0
mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX  217 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX	0
mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX  213 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX                                                                0
mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX  217 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX                                                                0
mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX  213 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_GFX_RB_RPTR_HI_BASE_IDX                                                                0