mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX   49 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX                                                           0
mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX   77 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX	0
mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX   75 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX                                                           0
mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX   77 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX                                                           0
mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX   77 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_GB_ADDR_CONFIG_READ_BASE_IDX                                                           0