mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX 10495 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX                                                             1
mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX   53 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX	0
mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX   51 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX                                                             0
mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX   53 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX                                                             0
mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX   53 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_CONTEXT_REG_TYPE3_BASE_IDX                                                             0