mmSDMA0_CLK_CTRL 40 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_CLK_CTRL 0x001b mmSDMA0_CLK_CTRL 222 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_d.h #define mmSDMA0_CLK_CTRL 0x3403 mmSDMA0_CLK_CTRL 160 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_d.h #define mmSDMA0_CLK_CTRL 0x3403 mmSDMA0_CLK_CTRL 157 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_d.h #define mmSDMA0_CLK_CTRL 0x3403 mmSDMA0_CLK_CTRL 294 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_d.h #define mmSDMA0_CLK_CTRL 0x3403 mmSDMA0_CLK_CTRL 68 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_CLK_CTRL 0x001b mmSDMA0_CLK_CTRL 66 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_CLK_CTRL 0x001b mmSDMA0_CLK_CTRL 68 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_CLK_CTRL 0x001b mmSDMA0_CLK_CTRL 68 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_CLK_CTRL 0x001b