mmSDMA0_CHICKEN_BITS_2_BASE_IDX  137 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmSDMA0_CHICKEN_BITS_2_BASE_IDX                                                                0
mmSDMA0_CHICKEN_BITS_2_BASE_IDX  165 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_offset.h #define mmSDMA0_CHICKEN_BITS_2_BASE_IDX	0
mmSDMA0_CHICKEN_BITS_2_BASE_IDX  163 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_offset.h #define mmSDMA0_CHICKEN_BITS_2_BASE_IDX                                                                0
mmSDMA0_CHICKEN_BITS_2_BASE_IDX  165 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_offset.h #define mmSDMA0_CHICKEN_BITS_2_BASE_IDX                                                                0
mmSDMA0_CHICKEN_BITS_2_BASE_IDX  165 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_offset.h #define mmSDMA0_CHICKEN_BITS_2_BASE_IDX                                                                0