mmRPB_WR_QUEUE_CNTL_BASE_IDX  441 drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_offset.h #define mmRPB_WR_QUEUE_CNTL_BASE_IDX	0
mmRPB_WR_QUEUE_CNTL_BASE_IDX  498 drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_0_0_offset.h #define mmRPB_WR_QUEUE_CNTL_BASE_IDX                                                                   0