mmRPB_WR_QUEUE_CNTL2  442 drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_offset.h #define mmRPB_WR_QUEUE_CNTL2	0x00ec
mmRPB_WR_QUEUE_CNTL2  499 drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_0_0_offset.h #define mmRPB_WR_QUEUE_CNTL2                                                                           0x00f4