mmRPB_CID_QUEUE_WR_BASE_IDX  409 drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_offset.h #define mmRPB_CID_QUEUE_WR_BASE_IDX	0
mmRPB_CID_QUEUE_WR_BASE_IDX  460 drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_0_0_offset.h #define mmRPB_CID_QUEUE_WR_BASE_IDX                                                                    0