mmRPB_CID_QUEUE_WR  408 drivers/gpu/drm/amd/include/asic_reg/athub/athub_1_0_offset.h #define mmRPB_CID_QUEUE_WR	0x00d8
mmRPB_CID_QUEUE_WR  459 drivers/gpu/drm/amd/include/asic_reg/athub/athub_2_0_0_offset.h #define mmRPB_CID_QUEUE_WR                                                                             0x00e0