mmROM_SW_CNTL_BASE_IDX  145 drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_11_0_0_offset.h #define mmROM_SW_CNTL_BASE_IDX                                                                         0
mmROM_SW_CNTL_BASE_IDX   41 drivers/gpu/drm/amd/include/asic_reg/smuio/smuio_9_0_offset.h #define mmROM_SW_CNTL_BASE_IDX                                                                         0