mmRMI_UTCL1_STATUS_BASE_IDX 3119 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRMI_UTCL1_STATUS_BASE_IDX                                                                    0
mmRMI_UTCL1_STATUS_BASE_IDX 1114 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRMI_UTCL1_STATUS_BASE_IDX                                                                    0
mmRMI_UTCL1_STATUS_BASE_IDX 1121 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRMI_UTCL1_STATUS_BASE_IDX                                                                    0
mmRMI_UTCL1_STATUS_BASE_IDX 1087 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRMI_UTCL1_STATUS_BASE_IDX                                                                    0