mmRMI_UTCL1_CNTL2 3096 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRMI_UTCL1_CNTL2                                                                              0x152c
mmRMI_UTCL1_CNTL2 1091 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRMI_UTCL1_CNTL2                                                                              0x078c
mmRMI_UTCL1_CNTL2 1098 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRMI_UTCL1_CNTL2                                                                              0x078c
mmRMI_UTCL1_CNTL2 1064 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRMI_UTCL1_CNTL2                                                                              0x078c