mmRLC_UTCL1_STATUS 9584 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_UTCL1_STATUS                                                                             0x4cd4
mmRLC_UTCL1_STATUS 6254 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_UTCL1_STATUS                                                                             0x4cd4
mmRLC_UTCL1_STATUS 6498 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_UTCL1_STATUS                                                                             0x4cd4
mmRLC_UTCL1_STATUS 6474 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_UTCL1_STATUS                                                                             0x4cd4