mmRLC_SRM_RLCV_COMMAND_BASE_IDX 9459 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_SRM_RLCV_COMMAND_BASE_IDX                                                                1
mmRLC_SRM_RLCV_COMMAND_BASE_IDX 6129 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_SRM_RLCV_COMMAND_BASE_IDX                                                                1
mmRLC_SRM_RLCV_COMMAND_BASE_IDX 6373 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_SRM_RLCV_COMMAND_BASE_IDX                                                                1
mmRLC_SRM_RLCV_COMMAND_BASE_IDX 6349 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_SRM_RLCV_COMMAND_BASE_IDX                                                                1