mmRLC_SPM_INT_STATUS_BASE_IDX 9435 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_SPM_INT_STATUS_BASE_IDX                                                                  1
mmRLC_SPM_INT_STATUS_BASE_IDX 6093 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_SPM_INT_STATUS_BASE_IDX                                                                  1
mmRLC_SPM_INT_STATUS_BASE_IDX 6337 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_SPM_INT_STATUS_BASE_IDX                                                                  1
mmRLC_SPM_INT_STATUS_BASE_IDX 6315 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_SPM_INT_STATUS_BASE_IDX                                                                  1