mmRLC_SMU_MESSAGE 9436 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_SMU_MESSAGE                                                                              0x4c76
mmRLC_SMU_MESSAGE 6094 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_SMU_MESSAGE                                                                              0x4c76
mmRLC_SMU_MESSAGE 6338 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_SMU_MESSAGE                                                                              0x4c76
mmRLC_SMU_MESSAGE 6316 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_SMU_MESSAGE                                                                              0x4c76
mmRLC_SMU_MESSAGE 1444 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmRLC_SMU_MESSAGE                                                       0xec76
mmRLC_SMU_MESSAGE 1440 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmRLC_SMU_MESSAGE                                                       0xec76