mmRLC_SMU_COMMAND 9506 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_SMU_COMMAND                                                                              0x4ca9
mmRLC_SMU_COMMAND 6174 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_SMU_COMMAND                                                                              0x4ca9
mmRLC_SMU_COMMAND 6418 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_SMU_COMMAND                                                                              0x4ca9
mmRLC_SMU_COMMAND 6394 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_SMU_COMMAND                                                                              0x4ca9
mmRLC_SMU_COMMAND 1488 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmRLC_SMU_COMMAND                                                       0xeca9
mmRLC_SMU_COMMAND 1484 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmRLC_SMU_COMMAND                                                       0xeca9