mmRLC_RLCV_TIMER_INT_1_BASE_IDX 10379 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_RLCV_TIMER_INT_1_BASE_IDX                                                                1
mmRLC_RLCV_TIMER_INT_1_BASE_IDX 7081 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_RLCV_TIMER_INT_1_BASE_IDX                                                                1