mmRLC_RLCV_TIMER_INT_0 10332 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_RLCV_TIMER_INT_0                                                                         0x5b25
mmRLC_RLCV_TIMER_INT_0 6756 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_RLCV_TIMER_INT_0                                                                         0x5b25
mmRLC_RLCV_TIMER_INT_0 7004 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_RLCV_TIMER_INT_0                                                                         0x5b25
mmRLC_RLCV_TIMER_INT_0 7040 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_RLCV_TIMER_INT_0                                                                         0x5b25