mmRLC_RLCV_TIMER_CTRL 10334 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_RLCV_TIMER_CTRL                                                                          0x5b26
mmRLC_RLCV_TIMER_CTRL 6758 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_RLCV_TIMER_CTRL                                                                          0x5b26
mmRLC_RLCV_TIMER_CTRL 7006 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_RLCV_TIMER_CTRL                                                                          0x5b26
mmRLC_RLCV_TIMER_CTRL 7042 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_RLCV_TIMER_CTRL                                                                          0x5b26