mmRLC_R2I_CNTL_0_BASE_IDX 9587 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_R2I_CNTL_0_BASE_IDX                                                                      1
mmRLC_R2I_CNTL_0_BASE_IDX 6257 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_R2I_CNTL_0_BASE_IDX                                                                      1
mmRLC_R2I_CNTL_0_BASE_IDX 6501 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_R2I_CNTL_0_BASE_IDX                                                                      1
mmRLC_R2I_CNTL_0_BASE_IDX 6477 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_R2I_CNTL_0_BASE_IDX                                                                      1