mmRLC_PG_CNTL    9354 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_PG_CNTL                                                                                  0x4c43
mmRLC_PG_CNTL    6010 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_PG_CNTL                                                                                  0x4c43
mmRLC_PG_CNTL    6254 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_PG_CNTL                                                                                  0x4c43
mmRLC_PG_CNTL    6230 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_PG_CNTL                                                                                  0x4c43
mmRLC_PG_CNTL    1165 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmRLC_PG_CNTL 0x30D7
mmRLC_PG_CNTL    1275 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmRLC_PG_CNTL                                                           0x3103
mmRLC_PG_CNTL    1288 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmRLC_PG_CNTL                                                           0x3103
mmRLC_PG_CNTL    1386 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmRLC_PG_CNTL                                                           0xec43
mmRLC_PG_CNTL    1388 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmRLC_PG_CNTL                                                           0xec43