mmRLC_MGCG_CTRL_BASE_IDX 9309 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_MGCG_CTRL_BASE_IDX                                                                       1
mmRLC_MGCG_CTRL_BASE_IDX 5979 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_MGCG_CTRL_BASE_IDX                                                                       1
mmRLC_MGCG_CTRL_BASE_IDX 6223 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_MGCG_CTRL_BASE_IDX                                                                       1
mmRLC_MGCG_CTRL_BASE_IDX 6187 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_MGCG_CTRL_BASE_IDX                                                                       1