mmRLC_MEM_SLP_CNTL 9276 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_MEM_SLP_CNTL                                                                             0x4c06
mmRLC_MEM_SLP_CNTL 5942 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_MEM_SLP_CNTL                                                                             0x4c06
mmRLC_MEM_SLP_CNTL 6186 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_MEM_SLP_CNTL                                                                             0x4c06
mmRLC_MEM_SLP_CNTL 6150 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_MEM_SLP_CNTL                                                                             0x4c06
mmRLC_MEM_SLP_CNTL 1156 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmRLC_MEM_SLP_CNTL 0x30D8
mmRLC_MEM_SLP_CNTL 1247 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmRLC_MEM_SLP_CNTL                                                      0x30c6
mmRLC_MEM_SLP_CNTL 1260 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmRLC_MEM_SLP_CNTL                                                      0x30c6
mmRLC_MEM_SLP_CNTL 1349 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmRLC_MEM_SLP_CNTL                                                      0xec06
mmRLC_MEM_SLP_CNTL 1351 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmRLC_MEM_SLP_CNTL                                                      0xec06