mmRLC_LB_CNTL    9306 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_LB_CNTL                                                                                  0x4c19
mmRLC_LB_CNTL    5976 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_LB_CNTL                                                                                  0x4c19
mmRLC_LB_CNTL    6220 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_LB_CNTL                                                                                  0x4c19
mmRLC_LB_CNTL    6184 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_LB_CNTL                                                                                  0x4c19
mmRLC_LB_CNTL    1148 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmRLC_LB_CNTL 0x30C3
mmRLC_LB_CNTL    1256 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmRLC_LB_CNTL                                                           0x30d9
mmRLC_LB_CNTL    1269 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmRLC_LB_CNTL                                                           0x30d9
mmRLC_LB_CNTL    1363 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmRLC_LB_CNTL                                                           0xec19
mmRLC_LB_CNTL    1366 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmRLC_LB_CNTL                                                           0xec19