mmRLC_GPM_UTCL1_CNTL_1 9526 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_GPM_UTCL1_CNTL_1                                                                         0x4cb3
mmRLC_GPM_UTCL1_CNTL_1 6194 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_GPM_UTCL1_CNTL_1                                                                         0x4cb3
mmRLC_GPM_UTCL1_CNTL_1 6438 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_GPM_UTCL1_CNTL_1                                                                         0x4cb3
mmRLC_GPM_UTCL1_CNTL_1 6414 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_GPM_UTCL1_CNTL_1                                                                         0x4cb3