mmRLC_GPM_TIMER_INT_1 9292 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_GPM_TIMER_INT_1                                                                          0x4c0f
mmRLC_GPM_TIMER_INT_1 5958 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_GPM_TIMER_INT_1                                                                          0x4c0f
mmRLC_GPM_TIMER_INT_1 6202 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_GPM_TIMER_INT_1                                                                          0x4c0f
mmRLC_GPM_TIMER_INT_1 6166 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_GPM_TIMER_INT_1                                                                          0x4c0f