mmRLC_GPM_TIMER_CTRL_BASE_IDX 9297 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_GPM_TIMER_CTRL_BASE_IDX                                                                  1
mmRLC_GPM_TIMER_CTRL_BASE_IDX 5963 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_GPM_TIMER_CTRL_BASE_IDX                                                                  1
mmRLC_GPM_TIMER_CTRL_BASE_IDX 6207 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_GPM_TIMER_CTRL_BASE_IDX                                                                  1
mmRLC_GPM_TIMER_CTRL_BASE_IDX 6171 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_GPM_TIMER_CTRL_BASE_IDX                                                                  1