mmRLC_GFX_RM_CNTL_BASE_IDX 10169 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_GFX_RM_CNTL_BASE_IDX                                                                     1
mmRLC_GFX_RM_CNTL_BASE_IDX 6547 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_GFX_RM_CNTL_BASE_IDX                                                                     1
mmRLC_GFX_RM_CNTL_BASE_IDX 6793 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_GFX_RM_CNTL_BASE_IDX                                                                     1
mmRLC_GFX_RM_CNTL_BASE_IDX 6811 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_GFX_RM_CNTL_BASE_IDX                                                                     1